India Aims to Be Top Semiconductor Nation by 2035 with Own IP in 6 Key Systems

Union Minister Ashwini Vaishnaw announced that India will develop its own Intellectual Property in six critical systems—compute, RF, networking, power, sensor, and memory—through the India Semiconductor Mission. He reported significant progress, with 10 projects under construction, 24 startups designing chips, and training provided at 315 educational institutions. The Minister set ambitious timelines, targeting 24 months for simpler IPs and 36 months for a suite of complex analog IPs, leveraging domestic and diaspora expertise. Vaishnaw expressed confidence that this foundation positions India to become a major global semiconductor player by 2035.

Key Points: India's Semiconductor Mission: Own IP, 2035 Global Goal

  • 10 projects under construction
  • 24 startups designing chips
  • Free EDA tools via C-DAC
  • 315 institutions with chip design training
  • Target of 24-36 months for key IPs
3 min read

India to create own IP in 6 systems; on track to be among most important semiconductor nations in world by 2035, says Ashwini Vaishnaw

Union Minister Ashwini Vaishnaw says India will create its own IP in compute, memory & more, targeting a top global semiconductor position by 2035.

"By 2035, India will be among the most important semiconductor nations in the world. - Ashwini Vaishnaw"

New Delhi, January 27

India will create its own Intellectual Property in six critical systems, including compute, RF, networking, power, sensor, and memory, through the India Semiconductor Mission, said Union Minister for Electronics and Information Technology Ashwini Vaishnaw. Speaking to the media on the progress of the national chip strategy, the Minister stated that India is on track to become one of the most important semiconductor nations in the world by 2035.

Vaishnaw said, "On the completion of four years of India semiconductor mission, 10 projects are under construction, production for four projects will start this year and 24 project startups have designed semiconductor chips, and in 315 educational insitutions students have received training to design semiconductor chips...We will create India's own IP in 6 systems of compute, RF, networking, power, sensor and memory through India Semiconductor Mission...As we go into 2029, India will become a major player in the semiconductor industry...By 2035, India will be among the most important semiconductor nations in the world..."

Earlier in the day, Vaishnaw stated that India's semiconductor design program has reached a significant level of achievement, enabling the nation to take off in the global chip industry.

During an interaction with 23 semiconductor chip design companies approved under the Design Linked Incentive (DLI) Scheme of the Semicon India Programme, Vaishnaw stated that the journey started three years ago has positioned the country to move beyond theoretical presentations to developed, working projects.

The Minister emphasised that the provision of free, sovereign access to Electronic Design Automation (EDA) tools under C-DAC gave participants a major lead in the design world. "When we started this program, a major concern was access to EDA tools and access to IP," Vaishnaw noted.

He highlighted that funding for startups becomes more accessible once a project is operational, adding, "Funding becomes much easier once you have developed a working project; otherwise, it's just a PPT presentation."

During the discussion, industry participants raised the challenge of indigenously developing standard Intellectual Properties (IPs), such as USB and PCIe, which require high-speed analog designs. Responding to a query regarding the timeline for such development, Vaishnaw set a target of 24 months for the creation of simpler IPs. "Let's take a target of 24 months then," the Minister said.

The conversation further delved into the complexities of analog IPs, which are critical for real-world applications and strategic sectors. Industry representatives pointed out that proving these IPs across multiple technology nodes, such as those from TSMC or UMC, is a time-consuming process. In response, Vaishnaw said, "This is a journey that we started three to four years ago, January 22. Within four years, we are at a very significantly good level of achievement. And this is a level where we can now take off."

"Suppose we make a request to all of you, and we support it fully. Maybe in a period of 36 months, we can have a suite of analog IPs coming out of our country. It is definitely possible," Vaishnaw said.

He noted that the skill set exists within the country and among the Indian diaspora holding senior positions in global semiconductor firms. The Minister suggested that standard IPs developed through this collaborative effort could eventually be housed in a DLI repository and mandated for use in chips utilised within India.

- ANI

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Reader Comments

P
Priya S
Training in 315 educational institutions is impressive. Building the talent pipeline is half the battle. Hope the students get good placement opportunities within India itself and don't have to go abroad.
S
Sarah B
As someone working in tech, the free access to EDA tools via C-DAC is a game-changer for startups. The minister is right - funding follows working projects, not just PowerPoints. This pragmatic approach is promising.
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Vikram M
The timelines for developing analog IPs (24-36 months) seem very optimistic. These are highly complex. Hope the government provides sustained policy and financial support without changing goalposts. Execution is key.
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Rohit P
Finally! We have been talking about semiconductor manufacturing for decades. Seeing 10 projects under construction and 4 starting production this year is concrete progress. This will create lakhs of high-quality jobs. 🙌
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Michael C
Leveraging the Indian diaspora in global semiconductor firms is a smart strategy. Their expertise can shortcut years of R&D. The plan to mandate use of Indian IP in chips used domestically could create a strong internal market.
K
Kavya N
While the vision is good, I hope this doesn't become another scheme with lots of announcements but slow ground reality. We need

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