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Technology News Updated Jun 25, 2026

IBM Unveils World’s First Sub-1 Nanometre Chip Technology Breakthrough

IBM has unveiled the world's first sub-1 nanometre chip technology, built on a 0.7 nm process node. The chip packs nearly 100 billion transistors and uses a novel nanostack architecture. It promises up to 50% higher performance or 70% greater energy efficiency compared to IBM's 2 nm chips. The breakthrough is expected to support generative AI, cloud infrastructure, and next-generation electronic devices.

IBM unveils world's first sub-1 nanometre chip technology

New Delhi, June 25

US-based technology giant IBM on Thursday unveiled what it described as the world's first sub-1 nanometre chip technology, a major breakthrough for the semiconductor industry as it approaches the physical limits of conventional chip scaling.

The new chip is built on a 0.7 nm, or 7-angstrom, process node and features a novel three-dimensional transistor architecture called nanostack, according to the company.

The chip enables continued improvements in performance and energy efficiency at atomic-scale dimensions, it added.

It packs nearly 100 billion transistors onto a device roughly the size of a fingernail, almost doubling the transistor density of its 2 nm chip technology unveiled in 2021.

The new technology is projected to deliver up to 50 per cent higher performance or 70 per cent greater energy efficiency compared to its 2 nm node chips, the company said.

The advancement is expected to support demanding applications such as generative AI, cloud infrastructure and next-generation electronic devices.

"IBM's latest chip breakthrough marks a landmark moment in computing, pushing technology beyond the nanometre era to the scale of atoms," said Jay Gambetta, Director of IBM Research and IBM Fellow.

The company said its nanostack architecture vertically stacks and staggers transistors, allowing more components to be packed onto a chip while enabling different materials to be optimised independently for performance and power efficiency.

Meanwhile, IBM researchers demonstrated that the architecture can significantly improve SRAM scaling, helping chip designers build more efficient processors capable of handling high-bandwidth AI workloads.

The company said it expects the earliest commercial adoption of the technology within the next five years.

In addition, the research was conducted at IBM's semiconductor research facility in Albany, New York, in collaboration with industry partners including ASML, Lam Research, Tokyo Electron and SCREEN Semiconductor Solutions.

— IANS

Reader Comments

Siddharth J

Impressive engineering! But I wonder about the cost and yield of such tiny transistors. At 0.7 nm, quantum effects must be a nightmare. Let's see if they can mass-produce this without defects. Still, kudos to IBM's R&D team.

Priya S

First they said 2 nm was the limit, now we're at 0.7 nm! The pace of innovation is mind-boggling. Hope this trickles down to affordable laptops and phones for students in India. We need computing power for our growing digital economy.

Kavya N

While we celebrate this breakthrough, remember that most of the world's chips are still made at 28 nm or larger nodes. The real challenge is bringing down the cost of advanced nodes for broader use. Also, 5 years is a long time - let's wait and watch.

Aditya G

This is a game changer for AI and cloud computing! India's startups and tech firms will greatly benefit from this. But we need our own chip design ecosystem - are we really going to depend on foreign tech for everything? Time for self-reliance.

Sneha F

Amazing achievement for IBM! But let's not forget the massive investment needed for this tech. Their R&D facility in Albany with partners like ASML shows the power of collaboration. India should push for joint ventures with such leaders.

We welcome thoughtful discussions from our readers. Please keep comments respectful and on-topic.

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